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ZigBee SDK - read from SPI device
Apr 17, 2024 05:45

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I am trying to connect to TLSR8258 CS5460A (energy/power IC) via SPI.

I had a look at the SPI example in the Driver SDK and in the spi.c code, but I don t think this is going to work.

The code in spi.c read function is like this:


/***write cmd***/

for (i = 0; i < CmdLen; i++) {

  reg_spi_data = Cmd[i];

  while(reg_spi_ctrl& FLD_SPI_BUSY); //wait writing finished

}

reg_spi_ctrl |=FLD_SPI_DATA_OUT_DIS;

/***when the read_bit was set 1,you can read 0x800008 to take eight clock cycle***/

reg_spi_ctrl |= FLD_SPI_RD; //enable read,0x09-bit3 : 0 for read ,1 for write

temp = reg_spi_data; //first byte isn t useful data,only take 8 clock cycle

while(reg_spi_ctrl &FLD_SPI_BUSY ); //wait reading finished


/***read data***/

for (i = 0; i < DataLen; i++) {

 if(i==(DataLen-1)){

  reg_spi_ctrl &= ~FLD_SPI_RD;

 }

 Data[i] = reg_spi_data; //take 8 clock cycles

 while(reg_spi_ctrl & FLD_SPI_BUSY ); //wait reading finished

}


What is required for CS5460A to read is while reading data from the SDO at the same time sending byte 0xFE.

This is from the datasheet of CS5460A:

During the read cycle, the SYNC0 command
(NOP) should be strobed on the SDI port while
clocking the data from the SDO port.

SYNC0 command is byte 0xFE


How can I clock out 0xFE byte on device SDI port, while reading data from device SDO port?

As you can see from "write cmd" and "read data" above, reg_spi_data is used for both writing and reading? So how can I write and read at the same time?

This is from the SPI protocol definition:

During each SPI clock cycle, full-duplex transmission of a single bit
occurs
. The main sends a bit on the MOSI line while the sub sends a bit
on the MISO line, and then each reads their corresponding incoming bit.
This sequence is maintained even when only one-directional data transfer
is intended.


From the TLSR8258 datasheet:

The TLSR8258 embeds SPI (Serial Peripheral interface), which could act as Master mode or Slave mode. SPI is a high-speed, full-duplex and synchronous communication bus requiring 4 bus lines including a chip select (CS) line, a data input (DI) line, a data output (DO) line and a clock (CK) line.

But then:

Address 0x09 bit[2] is the disabling bit for SPI Master output. When the bit is cleared, MCU writes data into address 0x08, then the SPI_DO pin outputs the data bit by bit during the 8 clock cycles generated by the SPI_CK pin. When the bit is set to 1b’1, SPI_DO output is disabled. 

Address 0x09 bit[3] is the enabling bit for SPI Master reading data function. When the bit is set to 1b’1, MCU reads the data from address 0x08, then the input data from the SPI_DI pin is shifted into address 0x08 during the 8 clock cycles generated by the SPI_CK pin. When the bit is cleared, SPI Master reading function is disabled.

It seems that there is only one data register 0x08 (in/out)


From this part in the data sheet:MCU reads the data from address 0x08, then the input data from the SPI_DI pin is shifted into address 0x08 that it would be possible but how to do it?

- Would I have to remove from the read function this line that disables data out -

reg_spi_ctrl |=FLD_SPI_DATA_OUT_DIS;

- and then write:

reg_spi_data = 0xFE;  //send 0xFE byte

- ... what to do here to get data in?

- do I write  

while(reg_spi_ctrl& FLD_SPI_BUSY); //wait writing finished

- and then

data_in = reg_spi_data;   //to read data

Will data_in have received data?


4 replies
TL_Soyo Apr 18, 2024 14:19
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Hi,

 The description in this datasheet  section has been modified to half-duplex http://wiki.telink-semi.cn/wiki/chip-series/TLSR825x-Series/, and currently only the 9 series supports full duplex spi. 

wes58 [Author] Apr 18, 2024 16:53
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So it doesn't comply with the SPI protocol specification.

I wasted 2 days trying to get it to work, What a disappointment that it took 4 years to find that out and update datasheet - 2022!

What is this in the latest datasheet?

Address 0x09 bit[3] is the enabling bit for SPI Master reading data function. When the bit is set to
1b’1, MCU reads the data from address 0x08, then the input data from the SPI_DI pin is shifted
into address 0x08 during the 8 clock cycles generated by the SPI_CK pin.


Reading this - MCU reads the data from address 0x08, - I understand that MCU sends data out from address 0x08?


I wonder whether it Is the limitation of the chip or limitation of the library?




TL_Soyo Apr 19, 2024 09:51
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The read and write of this register cannot be performed simultaneously, which is a limitation of the chip hardware.

wes58 [Author] Apr 22, 2024 14:10
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Since hardware SPI doesn't support full SPI protocol (full duplex), I have decided to implement "software SPI". Using sleep_us(10) to create clock pulse I have full duplex SPI working.