Interrupt priority and nested interrupt support on TC32 MCU

Topic

FAQ

wsyeo

Jul 09, 2018 09:02

中 /A

All Telink SoC datasheets and the handbook for TC32 MCU mention that they support high/low interrupt priority configuration as well as up to two-level nested interrupt servicing.

I have configured the Timer 0 interrupt as HIGH priority by setting the corresponding priority bit in the interrupt priority register (core address regfile[646:644]) and intentionally put a large delay inside the IRQ handler to see if a nested interrupt servicing ever occurs.

I wrote a simple code to keep track of the interrupt nesting level within the IRQ handler and executed it on TLSR8269, but it never reported of any interrupt nesting.

How can I get nested interrupts working?

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