Hi everyone,

I use TLSR8251 chip. I want to use ADC modul to period read voltage on pin PB2.

I chose the misc channel.

Max state = 2,   r_max_s = 10,   r_max_mc = 240,    sampling = 6 cycle.  Fadc = 4MHz,   Ttotad duration = 10,417us =>  Fs = 96kHz

I found some difference between documentation and driver. 

Documentation:

ADC data is always 15-bit format no matter what the resolution is set. For example, 14 bits
resolution indicates ADC data consists of 14-bit valid data and 1-bit sign extension bit.

Driver:

if(adc_data_buf[i] & BIT(13)){ //14 bit resolution, BIT(13) is sign bit, 1 means negative voltage in differential_mode

    adc_sample[i] = 0;

}
else{

    adc_sample[i] = ((unsigned short)adc_data_buf[i] & 0x1FFF); //BIT(12..0) is valid adc result

}

Which one is correct?

I have some questions.

1. Why in driver we wait minimum 2 sample cycles?   while(!clock_time_exceed(t0, 25)); //wait at least 2 sample cycle(f = 96K, T = 10.4us)

In documentation we can read that after "Caputre state" data is ready. It looks like 1 sample cycle is enough. Am I right?

2. Case: FIFO disable. Will the ADC module automatically go to the "Set state" after the "Capture state" will be completed? Or will it wait to result read?

3. Case: FIFO enable. Question as above. Will the ADC modul automatically go to write new value to FIFO buffer after it reaches FIFO size?

4. Does conversion take 6 cycle (in my settings) in Capture State or more? 

Thank you for your answers.

Best regards,

Krzysztof